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Test Documentation Hub

Pantheon includes dozens of highly specialized micro-kernels designed to isolate and stress specific components of modern GPU architectures. Select a test below to view a deep dive into its execution mechanics, target subsystems, and common failure symptoms.

Core & Compute

Tests designed to maximize Thermal Design Power (TDP), test specific ALU pipelines, and stress voltage regulator modules (VRMs).

  • Omni Virus --- Asynchronously overlaps HBM memory sweeps, FP16 Tensor math, FP32 Vector math, and SFU transcendental math to achieve 100% pipeline saturation.

  • Voltage Virus --- Uses volatile math to force rapid ALU state switching, inducing massive di/dt droop on the Logic Rail (VDD_GFX).

  • Pulse Virus --- Induces rapid transient power spikes by violently toggling the GPU between 100% heavy FMA load and 0% sleep states at 10Hz.

  • Tensor Virus --- Saturates matrix math pipelines by spamming continuous FP16 (Half-Precision) Fused Multiply-Add (FMA) instructions.

  • MMA Virus --- Leverages physical WMMA (Warp Matrix Multiply and Accumulate) instructions to push hardware Matrix Cores to their absolute thermal limits.

  • :material-Vector-combine: Transformer Virus --- Leverages low-level PTX and MFMA intrinsics to execute relentless FP8/FP4 Matrix Multiply-Accumulate operations on next-gen Transformer Engines.

  • FP64 Chokehold --- Unleashes a barrage of Double Precision (FP64) FMAs to expose the physical limits of the FP64 datapath.

  • Integer Virus --- Saturates the INT32 ALUs using bit-bashing, bitwise rotations, and XOR cascades to stress integer-specific datapaths.

  • SFU Virus --- Hammers the math pipelines with complex, high-latency transcendental functions (SIN, COS, EXP, LOG, RSQRT).

  • Incinerator --- Maximizes thermal density by simultaneously running Vector ALU math and forcing intentional SRAM/LDS bank conflicts.

Fixed-Function & Accelerators

Tests targeting specialized hardware blocks and "dark silicon" outside of the primary compute shaders.

  • :material-ray-trace: RT Virus --- Floods dedicated Ray Tracing cores with billions of non-coherent intersection tests to force continuous BVH traversal.

  • Media Encoder Virus --- Feeds high-entropy noise into hardware video encoders (NVENC/VCN) to stress fixed-function edge silicon.

Memory & Cache

Tests targeting VRAM bandwidth, HBM physical characteristics, queue limits, and cache arbiters.

  • Atomic Virus --- Overwhelms the L2 cache arbiters by forcing thousands of concurrent, wide-stride Atomic Read-Modify-Write operations.

  • Cache Latency --- Defeats hardware prefetchers by performing fully dependent pointer-chasing (random walks) across the memory pool.

  • HBM Write (Aggressive) --- Maximizes write operations by bypassing L2 cache and aggressively unrolling instructions with alternating bit patterns to induce signal crosstalk.

  • HBM Write (Standard) --- Tests standard sequential VRAM bandwidth using Non-Temporal Stores with rail-to-rail patterns.

  • HBM Read (Aggressive) --- Maximizes read operations using heavily unrolled, volatile pointer accesses to force continuous, direct memory fetches without caching.

  • HBM Read (Standard) --- Tests standard sequential VRAM read bandwidth using volatile reads decomposed into 32-bit chunks.

  • HBM Bank Thrasher --- Forces continuous row-buffer misses by striding memory reads across exact 2MB page boundaries.

  • HBM Cache Fracturing --- Forces massive uncoalesced reads (256-byte stride offset) to intentionally overwhelm the Unified Memory Controller (UMC) queues.

  • HBM Retention Bake --- Writes a payload, runs a heavy ALU virus to heat the die, then checks if the physical HBM capacitors leaked charge due to thermal stress.

  • HBM Asymmetric Thermal --- Hammers a tiny, isolated memory region while drawing maximum compute power to create a severe physical temperature gradient across the package.

Interconnect & Architecture

Tests targeting bus interfaces, crossbars, hardware schedulers, and memory management units.

  • P2P Thrasher --- Saturates NVLink, Infinity Fabric, and PCIe bridges with massive peer-to-peer DMA copies between multiple GPUs.

  • TLB Avalanche --- Forces a near 100% Translation Lookaside Buffer (TLB) miss rate by performing pseudo-random jumps across 4KB and 2MB page boundaries.

  • PCIe Thrasher --- Floods the bus using bidirectional, asynchronous Host-to-Device (H2D) and Device-to-Host (D2H) DMA memory copies.

  • RAS Validator --- Continuously reads a pristine pattern to detect Uncorrectable Errors (UEs) or expose the latency jitter of active ECC hardware scrubbing.

  • HBM TSV Thrasher --- Alternates driving the bus completely HIGH and LOW to maximize Data Bus Inversion (DBI) stress and TSV crosstalk on the physical interposer.

  • HBM PC Ping-Pong --- Forces data to cross the Infinity Fabric crossbar by reading from one physical memory stack and writing to a completely separate one.

  • Scheduler Virus --- Spams micro-kernels across 64 concurrent streams to force the GPU dispatcher into multiplexing mode and trigger context switch locks.

  • Baseline Metrics --- Initializes the GPU but executes zero compute/memory instructions, allowing the monitor to capture resting idle metrics.